Due to the ever-increasing functionality of electronic products, such as mobile phones, MP3 players, audiovisual players, digital cameras, and e-books, system data are not only becoming more voluminous, but also depend on reliable and high-speed access speed. Hence, flash memory manufacturers endeavor to increase memory density and access speed of a chip. To this end, it is feasible to have the layout of flash memory switching from single level cells (SLC) to multi-level cells (MLC). MLC technology is the key to fabrication of multi-level high-density flash memory components and is effective in achieving relatively large storage capacity and high access speed.
NOR flash memory is advantageously characterized by high-speed programming and erasing, complete addresses and data interfaces, and random reading. Hence, NOR flash memory is fit for use in memory that is seldom updated, such as BIOS or firmware. As regards its service life, NOR flash memory has 10,000 to 1,000,000 erasing cycles. In addition to PC motherboards (that store BIOS data in NOR flash memory), NOR flash memory is used in hand-held electronic devices (that store system data in NOR flash memory for starting the hand-held electronic devices at the high reading speed of NOR flash memory.)
However, the reading/programming process of flash memory is accompanied by generation of parasitic capacitance that inevitably decreases the applied voltage from the very beginning. The aforesaid phenomenon accounts for a decrease in the uniformity of distribution of critical voltage applied to memory cells. Since the critical voltage is an important parameter of a flash memory device, decreased uniformity leads to a reduction in the performance and conforming rate of the devices produced.